Apple IC Packaging Engineer in Santa Clara Valley, California

IC Packaging Engineer

Job Number: 86438464

Santa Clara Valley, California, United States

Posted: 17-Jul-2017

Weekly Hours: 40.00

Job Summary

You will be responsible for IC packaging development and new product introduction. We are looking for individuals who are very innovative, with a proven track record in a high volume manufacturing environment.

Key Qualifications

  • 5+ years of experience in Semiconductor Packaging Design, Process & Technology Development

  • Good understanding of cross-functional packaging areas: Si floor plan, package layout and architecture, enabling process technologies, thermal, mechanical, SI/PI, material, component & system level reliability, testing, and FA

  • Expert in advanced packaging technologies: Knowledge and insight to deliver high density / high performance interconnects in various form factor, thermo-mechanical, reliability, and cost constraints

  • Cross-functional coverage on package layout (Cadence APD/Allegro), critical signal integrity / power integrity, thermal, design rules, BOM, design for manufacturing, reliability, and cost

  • Ability to work independently and take on projects with minimum supervision

  • Excellent engineering problem solving skills with strong engineering physics

Description

• Work with cross-functional teams and lead package integration and architecture efforts

• Work with 3rd party and OSAT to bring packaging solution from concept to HVM

• Drive industry with advanced package solutions and specs

• 10% International travel

Education

• BS or MS Electrical Engineering, Mechanical Engineering, Materials Science or Physics required and relevant experience within technical discipline. MS or PhD preferred.

Additional Requirements